Several types of radio frequency power amplifier (RF-PA) transmit chains are known in the art. Analog-based chains generally perform baseband and intermediate-frequency signal processing through digital signal processing (DSP), then transition through precision high speed high-resolution digital-to-analog convertors (DACs) to the analog domain at an intermediate-frequency (IF). Filtering at IF, quadrature upconversion to the desired carrier frequency, and power amplification complete the chain. This type of analog amplifier chain enjoys the advantage of extensibility to arbitrary output power levels, especially in the final high-power stage, making this type of predriver suitable for driving high powered amplifiers (HPAs) used in wireless base stations, such as Doherty HPAs. However, the requirement for multiple low jitter, low phase noise synthesizers and functional blocks complicates the design and requires nulling of in-phase and quadrature (I and Q) mismatches.
Class-S digital amplifiers employ techniques akin to those used in switch mode Class-D audio amplifiers. Class-S amplifiers have the advantage of migrating a major part of the predriver functionality to the digital domain, where very large scale integration (VLSI) technology reduces chip count and eliminates offsets and drifts characteristic of analog circuitry. However, the high switching frequencies involved, typically four times the carrier frequency, combined with output device non-idealities, erode efficiency and introduce spectral distortion. These effects increase as power outputs rise, due to larger required devices and higher parasitic power losses.
There is, therefore, a continuing need for improved predriver circuits suitable for driving high power RF-PAs used for wireless communications. More particularly, there is a need for RF-PA predriver circuit architectures that combine the VLSI integration benefits of Class-S digital designs with the extensibility to arbitrary output power levels characteristic of analog designs.